Lead Emulation Engineer at Positron Corporation
United States
<meta><h2 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:29pt;font-weight:600;letter-spacing:0.5px;margin-top:18px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:17pt;white-space:pre-wrap;">Lead Emulation Engineer</strong></b></h2><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Location:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Remote (Global) </span><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Company:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Positron.ai</span></p><h3 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:21pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:13pt;white-space:pre-wrap;">The Mission</strong></b></h3><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">At Positron.ai, we are redefining the efficiency of AI Inference. As our Emulation Lead, you will be the architect of our pre-silicon validation strategy. You will take full ownership of our Cadence Palladium Z3 environment, bridging the gap between hardware design and system software. This is a high-impact role where you will build a specialized team to ensure our silicon is battle-tested and our software stack is production-ready long before the first chips return from the fab.</span></p><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><br></p><hr><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><br></p><h3 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:21pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:13pt;white-space:pre-wrap;">Key Responsibilities</strong></b></h3><ul data-pattern="discCircleSquare" data-depth="1" style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;"><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Ownership & Strategy:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Define and execute the end-to-end emulation strategy for our next-generation AI Inference ASIC.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Infrastructure Management:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Oversee the Oversee the complex, multi-site build process for emulation targets, ensuring design and software synchronization.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Manage builds and deployment</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> of our Palladium Z3 cluster (hosted via Cadence Cloud). Manage builds, job scheduling, and resource allocation.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Cross-Functional Synergy:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Act as the primary technical bridge between the </span><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">ASIC Design/DV</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> teams and the </span><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">System Software</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> team. Ensure the emulation platform provides a high-fidelity environment for driver and compiler development.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Team Leadership:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Recruit, mentor, and lead a lean, elite team of emulation specialists.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Environment Development:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Oversee the creation of transactors, monitors, and complex testbenches. Drive the development of a comprehensive emulation testplan that targets both hardware bugs and software performance bottlenecks.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Debug & Analysis:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Lead deep-dive debug sessions using Palladium’s advanced trace and capture capabilities to resolve complex SoC-level issues.</span></li></ul><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><br></p><hr><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><br></p><h3 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:21pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:13pt;white-space:pre-wrap;">Required Qualifications</strong></b></h3><ul data-pattern="discCircleSquare" data-depth="1" style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;"><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Experience:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> 8+ years in ASIC/SoC verification or emulation, with at least 2+ years in a leadership or "Architect" capacity.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Platform Expertise:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> Deep, hands-on experience with </span><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Cadence Palladium</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> systems (Z1, Z2, or Z3). Knowledge of the IXCOM/Dynamic Emulation interfaces is essential.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Technical Breadth:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> * Proficiency in </span><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">SystemVerilog/UVM</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> for emulation-ready testbenches.</span></li><li style="list-style:none;font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><ul data-pattern="discCircleSquare" data-depth="2" style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin-left:0px;margin-right:0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:circle;"><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Strong understanding of high-speed interfaces (PCIe, CXL, DDR5) and AI-specific data flows.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Comfortable with scripting (Python, Tcl) to automate build flows and results analysis.</span></li></ul></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><b><strong style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">The "Startup" Mindset:</strong></b><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;"> A proactive builder who prefers solving problems to filing tickets. You must be comfortable working in a fully remote, fast-paced environment.</span></li></ul><h3 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:21pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:13pt;white-space:pre-wrap;">Bonus Points For:</strong></b></h3><ul data-pattern="discCircleSquare" data-depth="1" style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;"><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Experience with AI/ML hardware accelerators or large-scale multi-core SoCs.</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Familiarity with hybrid emulation (Virtual Platforms + Palladium).</span></li><li style="color:rgb(0,0,0);font-size:11pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:11pt;white-space:pre-wrap;">Experience managing cloud-hosted hardware infrastructure.</span></li></ul><hr><h3 style="font-family:"Basel Grotesk",Arial,sans-serif;line-height:1.6;font-size:19pt;font-weight:600;letter-spacing:0.25px;margin-top:14px;margin-bottom:4px;padding-left:0px;"><b><strong style="color:rgb(0,0,0);font-size:18pt;white-space:pre-wrap;">Why Join Positron.ai?</strong></b></h3><ul data-pattern="discCircleSquare" data-depth="1" style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:11pt;font-weight:400;margin:8px 0px;line-height:1.6;padding:0px 0px 0px 32px;list-style-type:disc;"><li style="color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:12pt;white-space:pre-wrap;">Be part of a rapidly growing AI startup shaping the future of AI hardware</span></li><li style="color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:12pt;white-space:pre-wrap;">Work on groundbreaking technology with a highly skilled and passionate team</span></li><li style="color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:12pt;white-space:pre-wrap;">Competitive salary, equity, and comprehensive benefits package</span></li><li style="color:rgb(0,0,0);font-size:12pt;margin:3px 0px;letter-spacing:0.25px;line-height:1.6;"><span style="color:rgb(0,0,0);font-size:12pt;white-space:pre-wrap;">Flexible work environment with remote work options</span></li></ul><p style="font-family:"Basel Grotesk",Arial,sans-serif;font-size:12pt;font-weight:400;line-height:1.6;letter-spacing:0.25px;margin:4px 0px;padding:0px;"><span style="color:rgb(0,0,0);font-size:12pt;white-space:pre-wrap;">If you are excited about ensuring the highest quality AI hardware and leading an advanced verification team, we want to hear from you! Apply today.</span></p>
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